Nanoelectronics relies on multiple semiconductor processes resulting in pattering of macroscopic objects (silicon wafers) at nanoscale level. Advanced technologies developed by semiconductor manufacturers offer unprecedented control of the properties of the finished product in large volumes. The rapid pace of progress in the semiconductor manufacturing dictated by the Moore’s economic law also introduces a variety of novel nano-structured materials having poorly understood hazardous properties.
The NanoStreeM consortium has taken up the challenge in defining a road map of Safety of nanomaterials in nanoelectronics where we identify the existing gaps in our knowledge and a number of recommendations for their mitigation.
